MAX19506ETM+T【PDF 8/35 页】IC ADC 8BIT 2CH 100MSPS 48TQFN

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MAX19506

Dual-Channel, 8-Bit, 100Msps ADC

______________________________________________________________________________________

Serial Programming Interface

A serial interface programs the MAX19506 control reg-

isters through the CS, SDIN, and SCLK inputs. Serial

data is shifted into SDIN on the rising edge of SCLK

when CS is low. The MAX19506 ignores the data pre-

sented at SDIN and SCLK when CS is high. C

S must

transition high after each read/write operation. SDIN

also serves as the serial-data output for reading control

registers. The serial interface supports two-byte transfer

in a communication cycle. The first byte is a control

byte, containing the address and read/write instruction,

written to the MAX19506. The second byte is a data

byte and can be written to or read from the MAX19506.

Figure 6 shows a serial-interface communication cycle.

The first SDIN bit clocked in establishes the communi-

cation cycle as either a write or read transaction (0 for

write operation and 1 for read operation). The following

7 bits specify the address of the register to be written or

read. The final 8 SDIN bits are the register data. All

address and data bits are clocked in or out MSB first.

During a read operation, the MAX19506 serial port dri-

ves read data (D7) into SDIN after the falling edge of

SCLK following the 8th rising edge of SCLK. Since the

minimum hold time on SDIN input is zero, the master

can stop driving SDIN any time after the 8th rising edge

of SCLK. Subsequent data bits are driven into SDIN on

the falling edge of SCLK. Output data in a read opera-

tion is latched on the rising edge of SCLK. Figure 7

shows the detailed serial-interface timing diagram.

R/W

0 = WRITE

1 = READ

SCLK

SDIN

ADDRESS

DATA

WRITE OR READ

tCSS

tCSH

tSDD

tSDS

tSDH

tSCLK

SCLK

SDIN

WRITE

READ

Figure 6. Serial-Interface Communication Cycle

Figure 7. Serial-Interface Timing Diagram

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